From c4d56f4a2c7687739f3bf0f43bcc1f35c9bbeb8b Mon Sep 17 00:00:00 2001
From: liurunyu <lry9898@163.com>
Date: 星期三, 14 五月 2025 15:18:44 +0800
Subject: [PATCH] 1、表阀一体协议解析同步新版本；2、默认设备是表阀一体（0x02）

---
 pipIrr-platform/pipIrr-global/src/main/resources/application-common-web(233服务器).yml |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git "a/pipIrr-platform/pipIrr-global/src/main/resources/application-common-web\050233\346\234\215\345\212\241\345\231\250\051.yml" "b/pipIrr-platform/pipIrr-global/src/main/resources/application-common-web\050233\346\234\215\345\212\241\345\231\250\051.yml"
index 919318c..f274f98 100644
--- "a/pipIrr-platform/pipIrr-global/src/main/resources/application-common-web\050233\346\234\215\345\212\241\345\231\250\051.yml"
+++ "b/pipIrr-platform/pipIrr-global/src/main/resources/application-common-web\050233\346\234\215\345\212\241\345\231\250\051.yml"
@@ -2,3 +2,8 @@
   # 233鏈嶅姟鍣細ym,mj,sp,test
   # 121鏈嶅姟鍣細mq,yq,hlj,gz,lz,jc
   spring_main_datasource_names: ym,mj,sp,test
+
+  # 铏氭嫙鍗¤〃瀛楁in_use鎰忎负鍗犵敤鐘舵�侊紝褰撲负true鏃剁粺涓�璁剧疆鍊间负0
+  # 233鏈嶅姟鍣細false
+  # 121鏈嶅姟鍣細true
+  virtual_card_disable_set_inuse: false
\ No newline at end of file

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