From c3a0cb8e8d8025e3937149b64a604b8989b2de18 Mon Sep 17 00:00:00 2001 From: liurunyu <lry9898@163.com> Date: 星期二, 03 六月 2025 16:46:24 +0800 Subject: [PATCH] 1、表阀一体机阀门状态命令结果输出与测控一体阀做兼容； 2、虚拟卡状态写入时机进行修改，由原来的阶段写簇变成随时写入。 --- pipIrr-platform/pipIrr-mw/pipIrr-mw-simulate-rtu/src/main/resources/config.xml | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/pipIrr-platform/pipIrr-mw/pipIrr-mw-simulate-rtu/src/main/resources/config.xml b/pipIrr-platform/pipIrr-mw/pipIrr-mw-simulate-rtu/src/main/resources/config.xml index fa87df5..1996da7 100644 --- a/pipIrr-platform/pipIrr-mw/pipIrr-mw-simulate-rtu/src/main/resources/config.xml +++ b/pipIrr-platform/pipIrr-mw/pipIrr-mw-simulate-rtu/src/main/resources/config.xml @@ -10,5 +10,5 @@ --> <base rtuAddr="532328000214"></base> <!-- --> - <tcpCl mwServerIp="192.168.40.132" mwServerPort="60000" connectTimeout="3000" /> + <tcpCl mwServerIp="192.168.40.166" mwServerPort="60000" connectTimeout="3000" /> </config> \ No newline at end of file -- Gitblit v1.8.0